Phase Locked Loop

Phase Locked Loop is defined as a closed loop frequency control system. Today PLL is available as a single IC in the SE/NE560 series. The phase of the input signal generated is related to the input signal phase. PLL is basically a simple electronic circuit consisting of two main components – A Phase Detector and a (VCO) Variable Frequency Oscillator.

  • VCO- is an oscillator generating a periodic signal.
  • Phase Detector- compares the phase of the signal generated by the VCO with the phase of the input signal. Also, it helps the oscillator to adjust the phases of the signals so that they are matched.
  • Feedback Loop: To compare output signal with the input signal.

Block Diagram of PLL

PLL block diagram is shown below.


Phase Detector:

Phase detectors used inside a PLL can be of digital or analog type. Monolithic PLL circuits use analog phase detectors. And discrete type phase detectors are of digital type. The main function of the phase detector inside a PLL is to act as a comparator circuit. It compares the input and VCO output frequency, thereby producing a DC voltage. This dc voltage will be directly proportional to the phase difference between the input and VCO frequencies.

Example for Analog Phase Detector -Mixer Based Detector

Double balanced four diode ring mixer is one of the commonly used Analog Phase Detector.  It has the advantages of giving better performance and sensitivity.

Example for Digital Phase Detector - Exclusive OR Phase Detector

It is the simplest type of phase detector. The VCO (fo) and input signal frequencies (fi) are given as inputs. The figure below shows the basic working of the detector. This detector is commonly used when the fi and fo are of square waves.

                    digital phase detector

Low Pass Filter:

To remove the high frequency components and the high frequency noise, a Low Pass Filter is used here. It controls the characteristics like bandwidth, transient response and capture and lock ranges of the PLL.

Voltage Controlled Oscillator:

VCO in a PLL circuit is used to generate an output frequency that is proportional to the input frequency.SE/NE 566 VCO is used in PLL circuits with a frequency of 500 kHz. The VCO output will be a square or triangular wave.

Working of PLL

  • Input signal with voltage Vi and frequency fi is given to the phase detector.
  • Phase detector performs the comparator operation.
  • The detector will provide a DC voltage as the output, V=fi+fo.
  • The obtained voltage is then given to the low pass filter.
  • The LPF, removes the noise signals and then gives out V=fi-fo.
  • This output of LPF is then passed to the VCO.
  • In PLL, the output signal frequency must be proportional to the input signal frequency.
  • The feedback loops in the PLL, will help the input and output signal frequency to be compared and adjusted till the frequencies be the same.

Generally, we can divide the operation of the PLL into 3 stages:

  1. Free-running
  2. Capture
  3. Phase Locked State

Free-Running Stage:  It is the stage at which no voltage input is applied to the PLL.

Capture Stage:  In this stage, an input frequency is applied; VCO output begins changing and produces an output for comparison purpose.

Phase Locked Loop Stage: It is the stage when the frequency comparison process stops and the input and output frequencies are adjusted.

          Operation of PLL

Characteristics of Phase Locked Loop

  1. Acquisition and Tracking

For a PLL to know the phase of the input signal, first it has to be in the phase locked state. Also, the VCO center frequency ω0 is usually different from the frequency ωi of the input signal. So at first, the VCO frequency has to be tuned to the input frequency by the feedback loop. This process is called frequency pull in. Now inorder to adjust the VCO phase with the input phase, the PLL has to go to the Phase Locked State.

  1. Pull in Range

It is the frequency difference change between the input and VCO frequencies.

                                             ω P = Iωi − ω 0I

  1. Lock in Range

It is the frequency ranges were the PLL achieves the phase locked condition.

                                             ωL= |ωi −ω0|

  1. Hold in Range

The hold-in range ?ωH= |ωi −ω0| is determined by the lower and upper values of ωi, for which the phase-locked condition is lost.


It is the amount of phase change between output and the input signal for the required shift in the frequency of input signal.

Loop gain = KoKD

KD = phase detector sensitivity (V/radian), Ko = oscillator sensitivity (radians per sec/V).

  1. Free- Running Frequency

The VCO frequency at which no any control signal applied is called as Free- Running Frequency.

Phase Locked Loop (PLL) IC

                                LM565 IC

LM565 is a PLL IC which consists of a stable and linear VCO with a double balanced phase detector. Here the VCO frequency is set by the help of resistor and capacitor.

General Features

  • Frequency stability of VCO is about 200ppm/°C
  • Adjustable hold in range from (1% -60%).
  • Range of Frequency (0.001 Hz 500 KHz).
  • Highly linear triangle wave output.
  • 0.2% linearity of demodulated output.
  • Power supply (5 to 12 volts).

Some Applications

  • Robotics & Radio Control     
  • FSK Modulation
  • Frequency Multiplication and Division
  • Signal Regeneration
  • Tone Decoding
  • Data and Tape Synchronization
  • FM Demodulation
  • SCA Demodulators
  • Coherent Demodulators
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