What is System on Chip?
SoC acronym for system on chip is an IC which integrates all the components into a single chip. It may contain analog, digital, mixed signal and other radio frequency functions all lying on a single chip substrate. Today, SoCs are very common in electronics industry due to its low power consumption. Also, embedded system applications make great use of SoCs.
SoCs consists of:
- Control Unit: In SoCs, the major control units are microprocessors, microcontrollers, digital signal processors etc.
- Memory Blocks: ROM, RAM. Flash memory and EEPROM are the basic memory units inside a SoC chip.
- Timing Units: Oscillators and PLLs are the timing units of the System on chip.
- Other peripherals of the SoCs are counter timers, real-time timers and power on reset generators.
- Analog interfaces, external interfaces, voltage regulators and power management units form the basic interfaces of the SoCs.
SoC Structure: Design Flow
Design flow of SoC aims in the development of hardware and software of SoC designs. In general, the design flow of SoCs consists of:
- Hardware and Software Modules: Hardware blocks of SoCs are developed from pre-qualified hardware elements and software modules integrated using software development environment. The hardware description languages like Verilog, VHDL and SystemC are being used for the development of the modules.
- Functional Verification: The SoCs are verified for the logic correctness before it is being given to the foundry.
- Verify hardware and software designs: For the verification and debug of hardware and software of SoC designs, engineers have employed FPGA, simulation acceleration, emulation and other technologies.
- Place and Route: After the debugging of the SoC, the next step is to place and route the entire design to the integrated circuit before it is being given to the fabrication. In the fabrication process, full custom, standard cell and FPGA technologies are commonly used.
Advantages of SoC
- Low power.
- Low cost.
- High reliability.
- Small form factor.
- High integration levels.
- Fast operation.
- Greater design.
- Small size.
Disadvantages of SoC
- Fabrication cost.
- Increased complexity.
- Time to market demands.
- More verification.
NVIDIA Tegra 3 is a SoC of the Tegra family and this is used in various Android devices. Some devices like Asus Eee Pad, HTC One X and Google Nexus Tablet is using the Tegra 3 on the board. This comes with a CPU and five cores. Each core is a Cortex A9 ARM chip, while the fifth core is made of a low power silicon process and has a speed of 500MHz.
Qualcomm is important when Android smart phones and tablets are being used. It has a processor which is similar to the ARM Cortex A15 CPU.
This SoC is based on the ARM architecture. It has a 1.4GHz ARM Mali-400 MP4 quad-core GPU and Quad-core ARM Cortex – A9 CPU. This processor supports many applications like 3D gaming, multi-tasking and video recording and playback.
Medfield SoCs are not based on ARM architecture. It uses the x86 technologies to make these SoCs. Medfield SoCs can offer OEMs a 1.6-2GHz single-core processor and PowerVR’s SGX540 GPU.
It is the fourth generation OMAPs where ARM Cortex A9 45nm architecture is being used. Some Android devices that use this SoC are Motorola Atrix 2, Motorola Droid RAZR, LG Optimus 3D and LG Optimus Max.
SoC Design Challenges
The different SoC design challenges are given below:
- Architecture Strategy
- Design for Test Strategy
- Validation Strategy
- Synthesis Backend Strategy
- Integration Strategy
- On chip Isolation
The kind of processor that we use to design the SoC is really an important factor to be considered. Also, the kind of bus that has to be implemented is another matter of choice.
Most of the common physical defects are modeled as faults here. While the necessary circuits included in the SoC design help in checking the faults.
Validation Strategy of SoC designs involves two major issues. First issue is that we have to verify the IP cores. While the second issue is that we need to verify the integration of the system.
- Synthesis and Backend Strategy
There are many physical effects that have to be considered while designing the SoC synthesis and strategy. Effects like IR drop, cross talk, 3D noise, antenna effects and EMI effects. Inorder to tackle these issues, chip planning, power planning, DFT planning, clock planning, timing and area budgeting is required in the early stage of the design.
In the integration strategy, all the above listed facts have to be considered and assembled to bring out a smooth strategy.
In on chip isolation, many effects like impact of process technology, grounding effects, guard rings, shielding and on- chip decoupling is to be considered.
ARM Holdings and SoC
System on Chip devices became popular because of some major breakthroughs provided by ARM Holdings, a British company that has contributed significantly to the field of embedded systems. ARM developed and licensed processor designs that could be used by other companies to develop chips. This enabled greater flexibility in design and manufacture of chips. Chip manufacturers could build upon these CPU designs and add other necessary components to come up with SoC.
IP Cores or Intellectual Property Cores are fundamental building blocks of SoC. It is a reusable layout of IC design that is provided by companies like ARM to chip manufacturers subject to license agreements. IP Cores can be Soft cores or Hard cores. Soft cores are generally RTL schematics written in some hardware description language. They are called so because they can be subjected to small changes suiting the design. Hard cores are mostly analog components and certain digital cores whose function cannot be changed by designers.
One of the advantage of having reusable IC design layouts is that it facilitates a more open approach to designing. Having philosophies similar to the Free Software Movement an open source hardware community exists that develops digital open source hardware. This community called Open Cores publish core designs under Lesser General Public License (LGPL). Their aim is to develop tools and standards for open source cores and platforms and provide documentation for the same.
Software and Protocol Stacks
Hardware is not the only focus during SoC design. The chips developed must be supported by software drivers that control the operation of hardware. Since an SoC has to manage networking also the protocol stacks have to be written along with drivers. These stacks are software implementations of networking protocols.
Functional verification is a very important task in SoC manufacturing. It is the process of verifying that the hardware developed follows the logic intended by the designer. This involve testing the performance of the hardware against the various permutations and combinations of situations. The very number of such possibilities make this process extremely challenging. Experts use various methods to reduce this number and take help of software tools like Aldec at this stage.
On-chip debugging is emerging as a cheap alternative to simulative and emulative verification techniques. Simulations are not very close to physical hardware and methods to improve simiulation capabilities can be very costly. The cost can be brought down and more effective debugging can be ensured by the use of instrumentation techniques for on-chip debugging. On-Chip debugging for a component in an SoC is different from others. We may look into on-chip debugging of a processor as an example.
On-Chip Debugging of a Processor
This On-Chip Debugging System(OCDS) uses JTAG interface. It consists of three blocks – the OCDS module, core debug port and the JTAG module. The debugging operation is controlled using breakpoints. Breakpoints are triggers that alter the sequential operation of a processor. The processor is driven into required modes using breakpoints for performing analysis.
Instruction breakpoints are triggers set against instruction value of the processor. This helps in tracking the occurrence of instructions in the processor. A processor OCDS monitor concurrent instructions by having multiple instruction breakpoints. Instructions are evaluated by comparing the data or register values set by instructions.
Fabrication of SoC
Most common methods for fabricating SoCs are as a standard cell, full custom designing or using FPGAs. Full custom designing involves specifying the layout of every component of hardware design. Due to the labor intensiveness of this method it is preferred only when large number of repetition is needed. A more common method is the use of standard cells which are libraries already written by full custom designing. FPGAs allow implementation of complex combinational logical functions by a user with the help of programmable logic blocks and interconnects.
Applications of SoCs
Most common use of SoCs has been found in the mobile devices industry. The use of SoCs have enabled manufaturers of such devices to come up with devices good of very small form factor that offer ample performance. It also enables them to focus on features they project to the target customers than relying on capabilities of chips provided by some other company. SoCs also brought about a revolution in embedded systems by paving way for very small and portable single-board computers.
Examples of SoCs
Most of the SoCs available in the market today are ARM based. Some examples among SoCs in smartphone industry are Qualcomm's Snapdragon SoCs, Apple A4, and Nvidia Tegra series. Raspberry Pi 2 comes with Broadcom BCM2836 SoC. Several SoCs have been developed by the Open Cores community.